Unverified50% confidenceConceptExact time
When the hardware does not support native low-precision tensor cores, int4 weights are unpacked and expanded to bf16 or fp16 before matrix multiplication, causing the bandwidth and capacity advantages to be lost; T4G widening int4 to 16 bits and Neuron widening int4 to bf16 both fall under this mechanism.
1
Sources
50%
Confidence
Long-term
Relevance
10/12/2026
First Seen
Sources
Related Entities
Related Claims
UnverifiedNVIDIA L4 (g6/SageMaker) natively supports bf16, fp8, and int8, and int4 is widened to 16 bits; NVIDIA T4G (g5g) supports bf16 (emulated) and int8, does not support fp8, and widens int4 to 16 bits; NeuronCore-v2 (inf2/trn1) supports bf16 and int8, fp8 has hardware support but the compiler has yet to catch up, and int4 is widened to bf16 and is 27 times slower per call.78% similarUnverifiedINT4权重在芯片上仅需4个晶体管的存储单元，而FP32需要32个77% similarUnverifiedCompute-bound means the hardware's compute units are fully saturated, at which point increasing batch size or optimizing numerical precision (such as using BF16 instead of FP32) becomes meaningful.76% similarUnverifiedQuantization converts FP32 weights to INT8 or FP16, reducing computation and memory bandwidth pressure while maintaining audio quality.71% similar
Cite This Claim
Stable URI
https://kongchang.com/claim/1011106API
curl https://kongchang.com/api/v1/knowledge/claims/1011106MCP
get_claim(id=1011106)