Expired50% confidenceFactExact time
NVIDIA introduced 2:4 structured sparsity support in the Ampere architecture, requiring exactly 2 out of every 4 elements to be zero.
1
Sources
50%
Confidence
Medium-term (~90 days)
Relevance
7/2/2026
First Seen
Valid until: 9/30/2026(expired)
Sources
Related Claims
UnverifiedNVIDIA在Ampere架构(RTX 30系,2020年)引入专用INT8 Tensor Core使INT8推理速度相比FP16提升约2倍,NVFP4是为Blackwell(RTX 50系,2025年)定制的4位浮点格式67% similarUnverifiedNVIDIA released an NVFP4 quantized model of Qwen3 235B on Hugging Face; NVFP4 is a 4-bit floating-point format targeting the Hopper and Blackwell architectures with a theoretical compression ratio of 4x.67% similarUnverifiedNVIDIA GPUs introduced INT8 tensor cores starting with the Turing architecture, and the Ampere architecture further enhanced integer computation capabilities.66% similarUnverifiedNVIDIA designed a dedicated Tensor Core instruction mma.kind::mxf4 for NVFP4 in the Blackwell architecture (SM 100/103, such as the B100 and B200 series), and adopted an FP8 scaling factor mechanism with one scale per group of 16 elements.65% similarUnverifiedNVIDIA Ampere 架构引入了异步内存拷贝和稀疏矩阵加速单元,Hopper 架构引入了 Transformer Engine 专用硬件64% similar
Cite This Claim
Stable URI
https://kongchang.com/claim/42815API
curl https://kongchang.com/api/v1/knowledge/claims/42815MCP
get_claim(id=42815)