Concept
SpyreCode
The target code representation for the IBM Spyre accelerator, containing core-level parallel instructions and explicit DMA descriptions, generated by compilation through the MLIR backend.
Timeline (last 90 days)
Oct 20
The torch-spyre backend compiler translates Inductor's scheduling decisions into executable SpyreCode and uses MLIR as the intermediate representation foundation, building a dataflow compilation path from KTIR to SpyreCode.
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