VIDRAFT Completes LLM Pre-training on NPUs Without GPUs

Korean AI startup VIDRAFT has announced that it has fully completed a large language model pre-training run using only NPUs (Neural Processing Units), with no reliance on GPUs at any stage. According to Korean tech and finance outlet BigGo 파이낸스, this challenges the industry's conventional assumption that "LLM pre-training must depend on GPU clusters."

Why This Matters

Large language model pre-training has long been deeply tied to GPUs. Mainstream frameworks like PyTorch and JAX, along with their CUDA kernels, have been co-optimized with NVIDIA hardware for over a decade. Distributed training primitives such as the NCCL communication library, tensor parallelism, and pipeline parallelism all have mature GPU implementations. The vast majority of publicly disclosed LLM training recipes assume GPU memory hierarchies and interconnect structures (NVLink, InfiniBand) by default.

VIDRAFT's approach means that the "GPU-by-default assumption" of the above tech stack has been broken at the pre-training level for once. This is fundamentally different from running inference on NPUs—in inference scenarios, NPUs have long been commercially deployed (mobile SoCs, edge chips), but public cases of using NPUs for large-scale pre-training are extremely rare.

NPUs (Neural Processing Units) are specialized accelerators designed specifically for neural network tensor operations. Typical examples include Huawei Ascend, Google TPU, Apple Neural Engine, and the NPU cores in various mobile SoCs. Unlike the general-purpose SIMT architecture of GPUs, NPUs typically adopt systolic arrays or similar dataflow architectures to achieve higher matrix multiply-accumulate throughput at lower power consumption, at the cost of reduced programming flexibility. GPUs have accumulated over a decade of ecosystem maturity, with mature software stacks like CUDA, cuDNN, and NCCL that allow developers fine-grained control over memory hierarchies and communication; NPUs, by contrast, mostly rely on vendor-proprietary SDKs (such as Ascend's CANN or the TPU's XLA path), and their cross-platform portability and operator coverage are far inferior to GPUs. This is precisely the fundamental reason why NPUs are widely deployed on the inference side but have few public cases on the pre-training side: pre-training demands far more in terms of operator completeness, numerical stability, and distributed communication than inference.

Pre-training and inference differ fundamentally in engineering requirements. Inference is forward-only computation with high tolerance for numerical precision (can be quantized to INT8 or even INT4) and can be compiled offline into a fixed computation graph. Pre-training, however, requires full forward and backward propagation, optimizer state maintenance (such as Adam's momentum and variance), and cross-device gradient synchronization. Memory (or NPU on-chip memory) usage is typically several times that of inference, and it is extremely sensitive to numerical precision—during mixed-precision training, a single overflow or underflow can cause loss divergence. Furthermore, pre-training is a long-running, continuous task with extremely high demands on interconnect bandwidth, fault tolerance, and stability. Therefore, the ability to run inference on an NPU does not equate to the ability to run pre-training; the latter must cross more stringent engineering thresholds. This is the core context behind the attention that VIDRAFT's claim has attracted.

Engineering Hurdles NPU Pre-training Must Overcome

Migrating from GPU to NPU for pre-training is not simply a matter of swapping hardware. VIDRAFT must have completed engineering adaptations at least at the following levels:

Operator compatibility—The core tensor operations involved in Transformer pre-training (matrix multiplication, attention, layer normalization, embedding lookup) must be supported on the NPU with acceptable performance.

Distributed training coordination—Gradient synchronization and parameter updates between NPU devices need to be redesigned, as their interconnect topology may be completely different from GPU clusters.

Framework integration—Either modify existing frameworks to compile and schedule training graphs onto NPU compute units, or rely on vendor-provided SDKs.

Numerical precision management—The floating-point formats supported by NPUs may differ from those of GPUs, and training stability for pre-training requires careful handling of precision issues in both forward and backward propagation.

If any of these challenges is mishandled, it could lead to training collapse or convergence failure. VIDRAFT's claim of completing the full pre-training pipeline indicates that these issues have at least been addressed to some degree.

Parallelism strategies in distributed training are key to understanding this challenge. Mainstream approaches include data parallelism (each device holds a full model replica while data is sharded), tensor parallelism (splitting matrices within a single operator), pipeline parallelism (splitting the model by layers), and memory optimization techniques such as ZeRO/FSDP. These strategies depend heavily on high-speed inter-device interconnects: GPU clusters rely on NVLink and InfiniBand for high-bandwidth, low-latency communication, with the NCCL library deeply optimized for this. NPU device interconnect topologies are often different (such as Huawei Ascend's HCCL or the TPU's ICI), with varying communication primitives, bandwidth, and topology structures. Consequently, collective communication operations like gradient synchronization and All-Reduce need to be reimplemented and tuned, or they will become bottlenecks for training throughput. This is one of the most complex aspects that distinguishes NPU pre-training from single-card inference.

Key Missing Information and Points to Be Verified

There are clear gaps in the currently available information. The original report could not be fully retrieved due to rate limiting, so there is no benchmark data whatsoever—no loss curves, training throughput, or downstream task evaluation results.

VIDRAFT also did not disclose the model architecture, parameter scale, training data, or the specific NPU vendor used. This makes it impossible for outsiders to assess the actual level of this pre-training run: How large is the model? How many tokens were trained on? What was the final loss? How does the quality compare to a model of the same scale trained on GPUs?

Whether the results of NPU training and GPU training are comparable is itself a question that needs verification. Hardware-agnostic training is a necessary condition for quality alignment, but far from a sufficient one. The final model quality depends on data, scale, and optimization strategy—details that are currently all undisclosed.

Implications for ML Engineering Practitioners

The core signal here is hardware stack portability. GPU supply constraints and high costs are real bottlenecks for AI development globally, especially in regions where NVIDIA allocation quotas are limited. If NPUs can handle pre-training, it means alternative procurement and infrastructure paths exist.

However, this signal currently remains at the level of a "feasibility demonstration." Without reproducible numbers, public training code, or model weights, engineering teams cannot yet make technology selection decisions based on this. What training framework did VIDRAFT use? Was it adapted for PyTorch or JAX? What was the specific NPU model? The absence of these key details prevents the community from assessing its reproducibility and broader adoption value.

For engineers interested in alternative accelerator stacks, the next thing worth watching is whether VIDRAFT will release a technical report or open-source the relevant code. Only if the NPU pre-training approach can be reproduced and verified will it truly have the potential to reshape the industry's infrastructure landscape.

One-line Summary

Korean startup VIDRAFT claims to have completed LLM pre-training entirely on NPUs, challenging GPU dependence, but details and data are missing.

Paragraph Summary

Korean AI startup VIDRAFT announced it completed a large language model pre-training run entirely on NPUs without using GPUs, challenging the industry's conventional assumption that LLM pre-training must depend on GPU clusters. The article notes that this is fundamentally different from the common scenario of NPUs being used only for inference. Migrating from GPU to NPU for pre-training requires overcoming multiple engineering hurdles, including operator compatibility, distributed training coordination, framework integration, and numerical precision management. However, key information is severely lacking: no benchmark data such as loss curves, throughput, or downstream evaluations, and no disclosure of model architecture, parameter scale, training data, or NPU vendor—making the actual training quality impossible to assess. The core significance of this event lies in the signal it sends about hardware stack portability, but its reproducibility and broader adoption value remain to be verified.