#x86 microarchitecture
11 related articles
Research·2 min
Complete Disassembly of 80386 Microcode: A Reverse Engineering Feat Deep into x86 Processor Microarchitecture
A researcher completes full disassembly of Intel 80386 microcode, revealing how this x86 CISC processor decomposes complex instructions into micro-operations, with implications for security research and emulation.
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·4 min
RosaicLabs and Atom RTL Reveal Hidden Shifts in the x86 Ecosystem
Deep analysis of RosaicLabs, Intel Atom core RTL licensing, and 32-Tile AMX expansion — exploring x86 architecture's open licensing and customization transformation in the AI era.
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·3 min
How GitHub Achieves 45 GiB/s Single-Core Case-Folding: An In-Depth Optimization Analysis
Deep dive into how GitHub achieves over 45 GiB/s single-core case-folding using branch-free loops, byte-space arithmetic, and SIMD vectorization, approaching memory bandwidth limits.
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·3 min
Fix for Immich Crashes Caused by Proxmox's Default kvm64 CPU Type
Proxmox's default kvm64 CPU type only exposes x86-64-v1 instructions, causing Immich's ML container to crash when NumPy's baseline isn't met. Learn the root cause and one-command fix.
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·4 min
Andrew Kelley's Technical Optimism: Don't Fall Into Pessimism
Zig creator Andrew Kelley's SSW 2026 talk urges developers to reject 'black pill' nihilism, confronting software bloat and complexity with a builder's mindset rather than surrendering to pessimism.
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·3 min
Building a YOLO26 Inference Engine from Scratch in ARM64 Assembly: A Deep Dive into Low-Level Optimization
Deep dive into building a YOLO26n object detection inference engine from scratch using ARM64 assembly and C, covering NEON SIMD, Winograd convolution, GEMM micro-kernels, and cache tiling optimizations.
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CUDA 13.3 Adds Carryless Multiplicatio…
·2 min
CUDA 13.3 Adds Carryless Multiplication: A Key Step Forward for GPU Cryptography Acceleration
CUDA 13.3 introduces native carryless multiplication support, closing a 15-year GPU gap in AES-GCM, CRC, and cryptographic acceleration. Here's what it means.
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C++ Asymmetric Memory Barriers: Princi…
·4 min
C++ Asymmetric Memory Barriers: Principles, Implementation, and Engineering Applications
A deep dive into C++ asymmetric memory barriers: core principles, Linux membarrier syscall, compiler vs hardware fences, and engineering applications in RCU and lock-free data structures.
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·2 min
Unsloth v0.1.45 Released: Gemma 4 MTP Acceleration, Cross-Platform Fixes, and Studio Upgrades
Unsloth v0.1.45-beta adds Gemma 4 MTP support, AMD ROCm & NVIDIA Blackwell fixes, a new Hub download manager, and a compact RAG system for local LLM fine-tuning.
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Binary Coverage Analysis Without Sourc…
·2 min
Binary Coverage Analysis Without Source Code: INT3 Breakpoint Traps and Hardware Tracing in Practice
A deep dive into binary coverage collection without source code, covering INT3 breakpoint traps, page protection tricks, Intel PT hardware tracing, and AFL bitmaps for reverse engineering and fuzzing.
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Product Reviews·4 min
Intel Core Ultra 7 270K Drops $50 — Does It Now Crush AMD X3D in Value?
Intel Core Ultra 7 270K Plus drops $50, matching AMD Ryzen X3D gaming performance at a lower price. Detailed benchmarks, AMD comparison, and 2025 gaming CPU buying advice.
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