Micron and SK Hynix Pledge Billions in Expansion, but New Memory Capacity Won't Arrive Until 2028

Memory Giants' Billion-Dollar Investment Commitments

Against the backdrop of surging AI compute demand, the world's two largest memory chip giants—Micron and SK Hynix—recently announced DRAM capacity expansion plans worth tens of billions of dollars. The market views this as a direct response to the AI infrastructure buildout wave—from data centers to High Bandwidth Memory (HBM), virtually every AI application scenario is consuming unprecedented memory resources.

However, beneath the market's optimism lies a harsh reality: virtually none of the actual new capacity corresponding to these massive investments can truly come online before 2028. This means the current memory supply tightness will be difficult to fundamentally resolve in the coming years.

The Time Gap Between Investment and Capacity

The semiconductor manufacturing industry has an iron rule: from capital commitment to capacity delivery, there exists a lengthy and incompressible construction cycle. An advanced DRAM wafer fab typically requires three to five years from groundbreaking to volume production ramp. This includes not only facility construction but also the procurement, installation, and commissioning of cutting-edge equipment like Extreme Ultraviolet (EUV) lithography systems, as well as gradual yield improvement.

A Detailed Look at the Complete Wafer Fab Construction Cycle

Building an advanced DRAM wafer fab involves multiple stages that cannot be fully parallelized: first, site selection and environmental assessment (6-12 months), then civil construction including cleanroom construction (18-24 months), followed by equipment move-in and installation (6-12 months), then process development and yield ramp (12-18 months), and only then can volume production be achieved. Cleanroom construction standards are extremely stringent—air cleanliness must reach ISO Class 1 levels (fewer than 10 particles larger than 0.1 micrometers per cubic meter), with temperature and humidity fluctuations controlled within ±0.1°C. Additionally, advanced DRAM manufacturing requires massive amounts of ultrapure water (tens of thousands of tons daily), stable power supply, and specialty chemicals—building this supporting infrastructure is equally time-consuming and capital-intensive.

EUV Lithography: The Core Variable in Capacity Bottlenecks

Extreme Ultraviolet Lithography (EUV) is currently the most advanced semiconductor manufacturing technology, using extreme ultraviolet light with a wavelength of only 13.5 nanometers for chip pattern transfer. Equipment for this technology is exclusively supplied by the Dutch company ASML, with a single EUV lithography machine costing over $300 million and delivery lead times of 18-24 months. DRAM manufacturing began introducing EUV at the 1x nanometer node, with EUV layers progressively increasing through the 1α, 1β, and 1γ nodes. While EUV improves chip density and performance, it also significantly increases equipment investment and process complexity, making it a major contributor to extended capacity construction timelines. ASML's own production capacity is the biggest bottleneck for global semiconductor expansion—even with ample funding, memory manufacturers must queue for equipment delivery.

Therefore, even if Micron and SK Hynix sign investment contracts today, actual production line output won't form effective supply until around 2028. For a market in the midst of an AI explosion, this lag means DRAM supply-demand imbalance will persist for the next two to three years.

How AI Demand Is Reshaping the Memory Market Landscape

HBM Becomes the Focal Point of Supply-Demand Tension

The current memory market tightness largely stems from the exponential growth in High Bandwidth Memory (HBM) demand. NVIDIA and other companies' AI accelerator cards have nearly insatiable demand for HBM, and HBM production cannibalizes conventional DRAM wafer capacity. In other words, even if memory manufacturers' total capacity remains unchanged, the shift toward HBM production will tighten the supply of conventional DRAM.

From a technical perspective, High Bandwidth Memory (HBM) is an advanced packaged memory that vertically stacks multiple DRAM chips using Through-Silicon Via (TSV) technology and achieves ultra-high bandwidth interconnection with GPUs/AI accelerators through an interposer. Current mainstream HBM3E products stack 8-12 DRAM dies, with a single package providing over 1TB/s of bandwidth. HBM manufacturing requires not only advanced DRAM wafers but also complex back-end packaging processes—including wafer thinning to approximately 30 micrometers, TSV etching and filling, and chip stacking and bonding—making yield control extremely challenging. NVIDIA's H100/H200 and Blackwell series GPUs each carry multiple HBM packages, with a single HBM consuming approximately 3-4 times the wafer area of a conventional DRAM chip, which explains HBM capacity expansion's crowding-out effect on traditional DRAM supply.

This structural contradiction has driven memory prices steadily upward over recent periods. Manufacturers' massive investments are essentially preparing for the next wave of demand, but these preparations cannot be converted into available market supply in the short term.

AI Models' Insatiable Hunger for Memory

AI large models' demand for memory is growing at a pace exceeding Moore's Law. Taking GPT-4-class trillion-parameter models as an example, storing model weights alone requires several terabytes of memory, while intermediate activation values and gradients during training further multiply memory requirements. A single AI training cluster may deploy thousands to tens of thousands of GPUs, each equipped with 80-192GB of HBM, bringing a large training cluster's total HBM capacity to petabyte levels. Inference-side demand is equally substantial—as AI applications expand from text to multimodal (image, video, audio), per-inference memory consumption is also rapidly climbing. According to industry forecasts, AI-related DRAM demand will grow at a compound annual rate exceeding 30% between 2024-2028, far outpacing the overall DRAM market's approximately 10-15% growth rate. The scissors gap between this demand growth rate and capacity expansion speed is the fundamental reason for sustained memory market tightness.

The Logic Behind Cautious Capacity Planning

Memory manufacturers have historically maintained caution in expansion decisions. The DRAM industry has repeatedly suffered painful lessons from price collapses caused by overcapacity.

The DRAM industry's cyclical volatility is arguably the most extreme in the semiconductor sector. During the 2008 financial crisis, DRAM prices plummeted over 70%, directly leading to Germany's Qimonda going bankrupt, Japan's Elpida being acquired by Micron, and multiple Taiwanese DRAM manufacturers exiting the market. The industry experienced another trough in 2015-2016, prompting the three surviving players—Samsung, SK Hynix, and Micron—to form an oligopolistic understanding and shift toward more rational capital expenditure strategies. After 2018, the three companies collectively held approximately 95% of the global DRAM market, and the industry entered a phase of relatively orderly competition. This consolidation history profoundly influences current manufacturers' expansion decisions—they would rather endure criticism for short-term supply shortages than repeat the history of overcapacity causing industry-wide losses.

Therefore, even facing robust AI-driven demand, Micron and SK Hynix will not blindly expand but instead adopt a relatively conservative pace to ensure dynamic supply-demand balance and avoid repeating cyclical overcapacity. This caution partly explains the slow pace of capacity deployment—manufacturers prefer to maintain price firmness rather than risk aggressive expansion that could lead to future oversupply and price crashes.

Far-Reaching Impact on Downstream Industries

Cost Pressure Transmitted to the AI Application Layer

Sustained memory supply tightness and price increases will directly drive up AI infrastructure construction costs. For cloud service providers, AI startups, and even consumer electronics manufacturers, rising memory costs will erode profit margins or ultimately be passed on to end users. As AI model sizes continue to expand and demand for memory bandwidth and capacity grows, this cost pressure is particularly acute.

In concrete terms, HBM's cost share in AI accelerator cards has risen from approximately 20% in earlier generations to over 40%. In the BOM cost of a single NVIDIA Blackwell architecture GPU, HBM is the largest single cost item. When HBM prices continue to rise due to supply tightness, these costs ultimately manifest in cloud computing GPU instance pricing—meaning the economic threshold for training and deploying AI models is being raised by the memory supply chain.

Further Consolidation of the Oligopoly

The high barriers and long construction cycles of memory manufacturing effectively further consolidate the market positions of the few players—Micron, SK Hynix, and Samsung. New entrants find it virtually impossible to build competitive capacity in the short term—constructing a single advanced DRAM wafer fab alone requires over $10 billion in investment, plus decades of accumulated process know-how and thousands of experienced engineers. This oligopolistic structure will become even more entrenched during the AI-driven demand cycle, with the three major manufacturers' pricing power over the global memory market continuing to strengthen.

Conclusion: Patience Is the Only Remedy

The billions in investment by Micron and SK Hynix undoubtedly signal the industry's firm confidence in AI's long-term prospects. But years-long time gaps stand between investment and capacity, reminding us that in the highly capital-intensive, long-cycle semiconductor industry, no supply-side adjustment can happen overnight.

For the entire technology supply chain dependent on memory, the next two to three years will likely mean operating in a supply-constrained environment. True capacity release won't come until around 2028, and until then, the market can only seek balance amid the mismatch between demand and supply. This is both an industry growing pain under the AI wave and a key reference point for understanding the future trajectory of the memory market.

Key Takeaways