[KongchangAI]
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DeepSeek Open-Sources Full-Stack Ascend Toolchain, Reshaping the Logic of China's AI Ecosystem

DeepSeek Open-Sources Full-Stack Ascend Toolchain, Reshaping the Logic of China's AI Ecosystem

DeepSeek open-sources its full Ascend toolchain, positioning model makers — not chip vendors — as the definers of AI software standards.

On September 30, DeepSeek announced the open-source release of its complete training infrastructure — including the TileLang compiler framework, compute library, and distributed communication library — fully ported to Huawei's Ascend platform. The deeper significance lies not in the technical details but in the shift of power within China's AI ecosystem: the old dynamic, where chip vendors unilaterally defined software interfaces and model companies passively adapted, is giving way to a dual-engine model in which leading model companies set the low-level standards and chip vendors focus on hardware execution. TileLang is a CUDA-independent high-level programming framework; any chip platform that adapts to it can run DeepSeek's models, turning "runs DeepSeek" into an ecosystem on-ramp for developers. NVIDIA's moat was never really about chip performance — it was about the code and habits of 5.9 million developers. DeepSeek's open-source release is a direct challenge at the software standards layer.

A Rare Act of Proactive Open-Sourcing

On September 30, DeepSeekAd announced the open-sourcing of a suite of infrastructure components targeting Huawei's Ascend compute platform. The release covers the TileLang high-level language compiler, a compute library, and a distributed communication library — each with a direct counterpart in DeepSeek's previously open-sourced components for NVIDIA platforms. In short, DeepSeek has taken the low-level toolchain it refined while training its own models and ported it, in full, to domestic chips.

According to the accompanying video, Huawei's team provided unconditional support throughout development. The two parties jointly brought a 128-card super-node solution based on the Ascend 950 to production and performed deep optimization across both compute and communication paths. For a leading large model company to proactively develop and open-source a full software stack for a chip platform is virtually unprecedented in the history of the AI ecosystem.

The significance of this move cuts straight to one of the most entrenched beliefs in the AI industry — that CUDA is NVIDIA's deepest moat.

The True Power of the CUDA Moat

NVIDIA has held over 80% of the global AI chip market for years, but what truly keeps competitors up at night isn't the hardware — it's the CUDA ecosystem.

Approximately 5.9 million developers worldwide write code on CUDA

Around 5.9 million developers worldwide write code, tune models, and build ecosystems on CUDA. Swap in a different chip, and the hardware performance gap might close — but the codebases, toolchains, and ingrained habits accumulated by millions of developers all have to be rebuilt from scratch.

In other words, NVIDIA has used CUDA to define operator standards and turned compilation efficiency into an interface standard. Developers have no choice but to adapt; they have no power to define the rules in return. That standard-setting authority is far harder to dislodge than any single hardware specification.

CUDA (Compute Unified Device Architecture) is a parallel computing platform and programming model launched by NVIDIA in 2006 that allows developers to schedule thousands of GPU compute cores using a C-like language. Its moat doesn't stem from a single technical barrier but from nearly two decades of layered lock-in: at the base are deeply optimized operator libraries targeting NVIDIA hardware (e.g., cuBLAS, cuDNN); in the middle tier, mainstream frameworks like PyTorch and TensorFlow default to CUDA as their backend; at the top, millions of researchers and engineers have accumulated model code, tuning experience, and engineering paradigms on CUDA. Even when competing chips reach comparable peak compute, they often lack equivalent high-performance operator libraries, causing real-world usable performance to fall far short. This is the root cause of the "comparable on paper, huge gap in practice" phenomenon — and why many domestic chips look impressive in benchmarks but struggle in production.

From Passive Compatibility to Independent Definition

The prevailing strategy among domestic chip vendors has been to emulate CUDA compatibility — designing their own software stacks to mimic CUDA's interfaces so that developers can migrate with minimal code changes. This approach is pragmatic, but it also means forever following NVIDIA's rhythm and permanently occupying the chasing position.

TileLang is a high-level language framework entirely independent of CUDA

DeepSeek's open-source release breaks entirely from this reactive compatibility mindset. TileLang is a high-level language programming framework that is fully independent of CUDA. It is reportedly simpler to use than CUDA while its programming model is designed to fully exploit chip characteristics and approach the hardware performance ceiling.

Also worth noting is the validation path: TileLang was first verified on NVIDIA platforms, where the vast majority of operators used to train the DeepSeek Base model series were implemented with it — only then was it ported to Ascend. This means it is not a rushed experimental tool thrown together for domestic chips, but a mature system battle-tested through real large-scale training.

TileLang operates at a "Tile-level" programming abstraction. Its core idea is to let developers describe computational logic in units of data tiles, with the compiler automatically handling low-level memory transfers, pipeline scheduling, and instruction mapping — without requiring manual management of hardware-specific details like register files or on-chip cache. By contrast, CUDA programming demands deep familiarity with NVIDIA-specific hardware concepts such as warps and shared memory before high-performance kernels can be written. TileLang's design goal is to lower the bar for high-performance operator development from "must be a hardware expert" to "understanding the computational logic is enough," while using differentiated compiler backends to generate optimal instruction sequences for different chip architectures from the same operator description. This level of abstraction is the technical foundation that enables cross-platform portability.

The Shift in Ecosystem Ownership

Deeper than the technology itself is the shift in who gets to define the AI ecosystem.

Any chip platform that adapts to these components can run DeepSeek's models

Now the software stack standard is defined by DeepSeek. As a leading model company, it has used its own real training requirements to drive the design of low-level tooling — and open-sourced the entire result: operator libraries, communication libraries, and compiler tools. Any chip platform that adapts to these components can run DeepSeek's models.

Today these components run on Ascend; tomorrow other domestic chips can adapt to them just the same. This creates a dual-engine dynamic: chip vendors focus on hardware performance iteration and architecture optimization, while model companies define the upper-layer software interfaces and operator standards. The relationship has shifted from "you ship the chip, I'll adapt" to "I set the standard, you implement it."

DeepSeek was direct in its public statement: it hopes this release can serve as a reference model for building highly usable software ecosystems across more AI chips. The audience isn't any single chip company — it's the entire domestic chip industry.

The Ascend 950 is Huawei's latest generation AI training chip. A 128-card super-node solution connects 128 Ascend 950 chips via high-speed interconnects into a single logical training unit. In large model training, the compute-to-communication ratio within a node — the ratio of compute volume to communication volume — directly affects hardware utilization. Compute paths (execution efficiency of core operators like matrix multiplication and activation functions) and communication paths (collective communication bandwidth and latency in tensor parallelism and pipeline parallelism) therefore need to be co-optimized. A key focus of DeepSeek and Huawei's deep collaboration was joint optimization of communication topology and operator layout at this scale, ensuring the software stack design genuinely matches the hardware interconnect architecture rather than merely achieving functional compatibility.

The Strategic Logic of a Two-Pronged Approach

Abroad, NVIDIA dominates everything end-to-end — chips, software stack, and developer ecosystem all under one roof — making the chain long and iteration slow. Domestically, a different path is being forged.

Domestically, chip vendors and model companies are now making breakthroughs separately

Chip vendors and model companies are advancing on separate fronts: DeepSeek open-sources a toolchain already validated on NVIDIA platforms, Huawei pushes hardware performance toward its ceiling, and both sides co-optimize layer by layer across compute and communication paths. This division of labor is far more efficient than any single company trying to close the loop alone.

The significance here, then, isn't how much better TileLang is than CUDA, or how many lines of code DeepSeek wrote for Huawei. It signals that the power structure of China's domestic AI ecosystem is changing — where chip vendors once unilaterally defined everything and developers and model companies passively adapted, now the leading model company is actively participating in setting low-level standards while chip vendors focus on the hardware itself.

Hardware performance can be caught up to. But who gets to define the software ecosystem's standards determines who holds the initiative in the future. With this move, DeepSeek has cut directly into the most critical piece of CUDA's cake.

#DeepSeek#Ascend#TileLang#CUDA#Huawei#AI ecosystem#open source#domestic AI chips#software stack#large model training
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