M5 Ultra AI Performance Benchmarks: The Most Powerful AI Mac with Nearly 5x Matrix Computing Performance

Apple's most powerful chip has once again pushed the performance ceiling for desktop AI. A Bilibili content creator conducted a comprehensive deep-dive benchmark of the M5 Ultra — covering local video generation, large model inference, and chip architecture — with a straightforward conclusion: its AI performance is approaching four times that of the previous-generation M3 Ultra. What's actually driving that number?

Local Video Generation: From "Barely Functional" to "Actually Usable"

Running state-of-the-art video models locally has always been the ultimate stress test for Mac. The benchmark used MiniMax H3 — one of the most capable video generation models available today. Its scale is staggering: the Diffusion Transformer responsible for image generation has 33 billion parameters, the Qwen3 VL model handling input understanding has 32 billion, totaling 65 billion parameters. At 8-bit quantization, that requires roughly 60GB of memory — the local compute demands are immense.

For generating a 5-second 768P video with Fast Cache enabled, the M3 Ultra took 37 minutes and 14 seconds, while the M5 Ultra finished in just 9 minutes and 24 seconds — nearly 4x faster. With Fast Cache disabled for higher visual fidelity, the performance gap remains close to 4x. The significance here is that local video generation has crossed the line from "just barely possible" to genuinely usable.

For most creators, the more practical workflow is dropping resolution to 512×256 to generate drafts first. In this mode, the M5 Ultra produces a 5-second video in under 40 seconds, compared to 161 seconds on the M3 Ultra. No queues, no token costs, a draft in under a minute — that's an excellent value proposition for AI short-form video creation.

Neural Accelerator: The Engine Behind the Performance Leap

Both chips have 80-core GPUs — so why such a large gap in video generation? The key is the Neural Accelerator that Apple added to every GPU core across the entire M5 lineup. It specifically accelerates General Matrix Multiplication (GEMM) — the core operation in AI inference.

It works by breaking large matrices into smaller blocks suited for parallel hardware processing, while keeping data in nearby cache for repeated reuse — minimizing costly memory accesses. The core Omni Transformer denoising module in MiniMax H3 happens to be packed with exactly these kinds of operations. The creator's breakdown found that without Fast Cache, generating a 768P video takes about 21 minutes total — with 20 of those minutes spent on Transformer denoising, the most matrix-operation-intensive step.

Theoretical compute benchmarks tell an even clearer story. For FP16 precision on a 4K×4K×4K transposed matrix multiplication task: without Neural Accelerator, the M5 Ultra delivers 30.75 TFLOPS — about 96% faster than the M5 Max and about 36% faster than the M3 Ultra (also an 80-core GPU). With Neural Accelerator enabled, the M5 Ultra breaks through to 107 TFLOPS — 3.51x its own non-accelerated performance, and 4.79x that of the M3 Ultra. Same 80-core GPU count, nearly 5x difference in matrix multiplication between generations.

Scaling up to a 4K×4K×16K matrix, the M5 Ultra still hits 91 TFLOPS, while the M5 Max and M3 Ultra land at 34 and 22 TFLOPS respectively — with the Ultra-over-Max advantage growing further.

General Matrix Multiplication (GEMM) is the most fundamental and computationally intensive operation in deep learning inference. Whether it's the self-attention mechanism and feed-forward networks in Transformers, or convolution layers in CNNs, everything ultimately reduces to large-scale matrix multiplication. The design of modern AI accelerators often centers on specialized GEMM optimization — NVIDIA's Tensor Cores and Google TPU's Systolic Arrays follow the same philosophy. By embedding a Neural Accelerator inside each GPU core in the M5, Apple has essentially pushed this specialized acceleration capability down to the fundamental execution unit of the GPU. This means even general matrix operations that don't explicitly invoke a neural network framework can automatically benefit — rather than requiring a specific API path to unlock accelerated resources, as was the case before. This architectural choice explains how the same 80-core GPU count can yield a nearly 5x difference in matrix multiplication performance between generations.

Large Model Inference: Dramatically Shorter Prefill Times

Neural Accelerator doesn't just accelerate video generation — it also addresses a longstanding pain point on Mac: excessively long Prefill times during large model inference (the phase where the model reads and processes the entire input). The longer the input, the more excruciating the wait for the first token — especially noticeable when feeding a paper or large codeblock. Since Prefill is also packed with dense matrix multiplications from the Attention mechanism, it benefits just as much from the same acceleration.

Using the recommended local model Qwen3 27B as the benchmark: with 512-token short input, the M3 Ultra takes 1.65 seconds while the M5 Ultra takes only 0.47 seconds. But the gap really opens up with long contexts — at 8K input, the M4 Max takes 46 seconds, M3 Ultra takes 21 seconds, M5 Max takes 12 seconds, while the M5 Ultra takes just 4.85 seconds. At 32K input, the M3 Ultra takes 96 seconds versus 21 seconds for the M5 Ultra; at 128K input, the M3 Ultra takes 8 minutes and 35 seconds compared to about 2.5 minutes for the M5 Ultra.

Scaling up to larger MoE models like DeepSeek^Ad V4 Flash (approximately 284 billion total parameters, ~13 billion activated per token) and GLM 5.3 Flash (320 billion total parameters, ~18 billion activated), the M5 Ultra still maintains roughly 3x or greater Prefill acceleration on long contexts. This is particularly beneficial for local Agent applications — Agents frequently work with large amounts of context such as project structures and tool descriptions, making fast time-to-first-token critical to the user experience.

Large model inference engineering is divided into two fundamentally different phases, and understanding this distinction helps interpret the performance numbers. The Prefill phase (also called prompt processing or pre-filling) processes all input tokens at once, computing and caching the Key-Value states (KV Cache) for each position. Its computational complexity scales quadratically with input length, demanding enormous compute throughput — it's compute-bound. The Decode phase generates tokens autoregressively one at a time; the primary bottleneck here is moving the entire KV Cache and model weights from memory to compute units, making it memory-bandwidth-bound. This is precisely why Neural Accelerator provides 3–5x acceleration on Prefill but much more modest gains on Decode, where the bigger benefit comes from increased memory bandwidth. In practice, Prefill speed determines "time-to-first-token" — the wait from submitting a question to the model starting its response. Decode speed determines how smoothly tokens stream out.

Decode Speed and Memory Bandwidth

The Decode phase (tokens generated per second after the response begins) is primarily governed by memory bandwidth. For Qwen3 27B with 512-token input, the M3 Ultra delivers roughly 35 tokens/sec while the M5 Ultra reaches 55 tokens/sec; at 64K input, the figures are 26 and 41 tokens/sec respectively. The M5 Ultra maintains approximately 60% improvement over the M3 Ultra across all test configurations.

Underpinning this is a significant memory bandwidth jump: the M3 Ultra offers 819 GB/s while the M5 Ultra reaches 1.2 TB/s — about a 50% increase, consistent with the Decode improvement. The creator notes that 1.2 TB/s is a remarkable figure for a desktop device — the 40GB A100 with HBM memory topped out at 1.6 TB/s, and reaching this level with LPDDR5X is no small feat. On the CPU side, the M5 Ultra's aggregate all-core read bandwidth climbs to 500 GB/s, significantly ahead of the M3 Ultra's 265 GB/s and M5 Max's 298 GB/s.

Why Ultra Still Uses "Glue" Interconnects

In Geekbench, the M5 Ultra scores 3731 single-core and approximately 50,000 multi-core — roughly 26% higher single-core and 31% higher multi-core than the M3 Ultra. In Blender rendering, it outperforms the M3 Ultra by over 70%, approaching double the performance in some scenarios. This suggests the new Ultra Fusion technology has meaningfully addressed the older issue of excessive inter-die communication latency that prevented the chip from reaching its full potential.

So why is Apple still using a "glued together" approach in the fourth-generation Ultra? The creator offers an engineering perspective: a single silicon die cannot simply be scaled up indefinitely without cost. Larger dies mean higher manufacturing costs and lower yields, plus physical limits from the lithography exposure area. Even if you could build one giant chip, problems like inter-core communication and cache coherency would still exist — data transfer distance and latency don't vanish automatically. For something at the scale of Ultra, multi-chip is a practical, cost-effective choice. Apple's real job is to continuously refine Ultra Fusion so the performance penalty of chip collaboration shrinks with each generation.

How AI Is Reshaping Apple Silicon Design

Looking across multiple generations of Apple Silicon, the influence of AI is unmistakable: the M1's Unified Memory allowed CPU and GPU to share data — an accidental advantage that gave Mac a head start in local inference; M3 enabled 512GB memory, allowing trillion-parameter MoE models to fit inside a Mac; M4 strengthened CPU machine learning acceleration; M5 placed Neural Accelerators inside every GPU core, benefiting nearly all AI workloads; M5 Ultra amplifies that advantage further, standing as the undisputed most powerful AI Mac. Reports suggest M6 will further enhance Neural Accelerator performance.

What's more interesting is the trajectory itself. Half a year ago, the same creator was setting up four Macs in a cluster. Today, a single M5 Ultra matches the compute of those four machines combined. From ENIAC — filling a room and weighing 27 tons — to the smartphone in your pocket, to AI generation and inference capabilities steadily moving into personal computers: perhaps in another year or two, we'll be able to fit something approaching GPT-6-level capability into a personal computer, with no internet required and no data privacy concerns. Whether the M5 Ultra will appreciate in value like the M3 Ultra — which became something of a "store of value" — remains to be seen, but the true worth of compute ultimately lies in what we create with it.

Background Notes

Ultra Fusion is Apple's approach to combining two identical Max chips into a single logical chip via high-bandwidth package interconnect technology. To the operating system and applications, it presents as a single unified chip. The core challenge is maintaining cache coherency between the two dies — when one die modifies a block of data, the other die's cache must be promptly invalidated or synchronized, or data errors will occur. The higher the interconnect bandwidth and the lower the latency, the more the two dies behave as a single chip. Each successive generation of Ultra Fusion has primarily focused on increasing die-to-die interconnect bandwidth and reducing latency — which is why Blender multi-core performance in this article improved over 70%, approaching the theoretical 2x ceiling. This indicates that for highly parallel rendering workloads, die-to-die communication is no longer the primary bottleneck. By contrast, earlier Ultra chips often couldn't linearly scale performance on workloads requiring frequent cross-die synchronization.