Where Does Computing Power Hit Its Limit? From Feynman's Prophecy to the Post-Moore Era

On the evening of December 29, 1959, physicist Richard Feynman delivered a lecture titled "There's Plenty of Room at the Bottom" at the American Physical Society meeting at Caltech. This talk is regarded as the intellectual starting point of nanotechnology and extreme computing, and it provides a historical reference point for today's question of "how far can computing be pushed." MIT Technology Review's Explainers series recently took up this theme to unpack the physical constraints and engineering breakthroughs behind computing growth.

Feynman's Vision: The Room at the Bottom Has Never Been Exhausted

In his lecture, Feynman made a core observation: humanity had not yet truly explored the potential for manufacturing and information manipulation at the microscopic scale. He imagined shrinking the 24 volumes of the Encyclopaedia Britannica to the size of a pinhead and explored the possibility of writing information at the atomic scale. This thought experiment points directly at the ultimate question of computing density—how much information can we pack into how small a space.

More than sixty years later, chip fabrication has advanced to the nanometer scale and storage density has improved by several orders of magnitude, yet Feynman's "room at the bottom" proposition is not outdated. MIT Technology Review notes that computing technology now stands at the intersection of multiple physical limits, and the path to breakthrough no longer relies solely on transistor scaling.

Three Bottlenecks: Physics, Energy, and Cost

The primary constraint on further computing advances comes from the physical level. As transistor dimensions approach the atomic scale, quantum tunneling effects cause leakage and heat that are difficult to suppress through traditional means. Second, energy consumption has become a more practical bottleneck: the growth rate of data center power consumption has drawn widespread industry attention, and cooling costs continue to rise as a share of total cost of ownership. Third is economics—the R&D and fabrication plant costs for advanced process nodes are climbing exponentially, and the number of manufacturers able to afford cutting-edge nodes keeps shrinking.

The combined effect of these three bottlenecks is making the path of "improving computing power simply by shrinking transistors" gradually ineffective. The industry is beginning to turn toward diverse directions such as architectural innovation, advanced packaging, specialized accelerators, and new material systems.

Quantum tunneling effect is one of the core mechanisms behind the physical limits encountered in transistor scaling. When a transistor's channel length shrinks to the nanometer scale and the gate insulating layer becomes only a few atomic layers thick, electrons are no longer fully confined by the potential barrier but have a certain probability of directly "tunneling" through the insulating layer, forming leakage current. This leakage not only increases static power consumption but also degrades transistor switching characteristics, making it difficult for the device to reliably distinguish between "on" and "off" states. Under classical physics, the higher and thicker the barrier, the harder it is for particles to cross; but quantum mechanics allows electrons to penetrate the barrier as wavefunctions, with tunneling probability rising exponentially with barrier thickness. Therefore, when gate oxide thickness approaches its physical lower limit, continued scaling will trigger unacceptable leakage and heat—this is precisely the fundamental physical obstacle that the traditional Moore's Law path has encountered.

Beyond Scaling: The Next Leg of Computing

This article from MIT Technology Review is part of its Explainers series, positioned to help readers understand the context behind complex technology topics. The article starts from Feynman's lecture, with an implicit thread: the advancement of computing technology has never been merely an engineering problem, but a continuous probing of the boundaries of physical laws.

From an industry practice perspective, current exploration is concentrated in several directions: chiplets and 3D packaging extend the economics of Moore's Law; optical computing and neuromorphic computing attempt to bypass the von Neumann bottleneck; and quantum computing seeks exponential speedups on specific problems. Each of these paths faces challenges of maturity and engineering, but together they form the computing growth puzzle of the "post-scaling era."

At the end of that lecture, Feynman offered a $1,000 prize to anyone who could shrink a page of a book to 1/25,000 scale. That challenge was surpassed long ago, but the question of "how far can computing be pushed" still begins anew at every new node.

The von Neumann bottleneck refers to the phenomenon in traditional computer architecture where data transfer bandwidth and latency between the processor and memory limit overall performance. In the von Neumann architecture, instructions and data share the same bus, and the CPU must frequently read data from and write results to memory, while memory access speed is far lower than processor computation speed, forming a "memory wall." As computing demands grow, this bottleneck becomes increasingly prominent, especially in data-intensive tasks where the processor spends much of its time waiting for data movement. Neuromorphic computing mimics the compute-in-memory structure of biological neurons, fusing computation and storage into the same physical unit to reduce data movement overhead; optical computing uses photons for transmission and computation, promising higher bandwidth and lower-latency interconnects. The common goal of these paths is precisely to bypass or alleviate the constraints the von Neumann bottleneck places on computing improvement.

One-line Summary

Sixty years after Feynman's lecture, computing advancement faces triple bottlenecks of physics, energy, and cost, and the industry is turning to diverse technology paths.

Paragraph Summary

The article takes Feynman's 1959 "room at the bottom" lecture as its starting point, tracing the intellectual origins of nanotechnology and extreme computing. MIT Technology Review's Explainers series uses this to ask about the prospects and boundaries of computing growth. Chip fabrication has now reached the nanometer scale, but as transistor scaling approaches the atomic scale, quantum tunneling causes leakage and heat, energy and cooling costs keep climbing, and the economic threshold for advanced processes grows ever higher. The combined effect of these three bottlenecks is gradually rendering the path that relies solely on transistor scaling ineffective. The industry is therefore turning toward diverse directions including architectural innovation, advanced packaging, specialized accelerators, optical computing, neuromorphic computing, and quantum computing, forming the computing growth puzzle of the "post-scaling era." Feynman's question still begins anew at every new node.