[KongchangAI]
ConceptChip on Wafer on Substrate / 先进封装

CoWoS

An advanced chip packaging technology developed by TSMC that tightly integrates multiple chips on a single substrate, substantially reducing inter-chip communication distances to achieve higher bandwidth and lower power consumption. It is a key packaging solution for modern AI accelerators.

Timeline (last 90 days)

Oct 16

Broadcom possesses key IP such as high-speed SerDes, switch chips, and advanced packaging (such as supporting CoWoS-type processes).

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Oct 14

A chiplet refers to splitting what was originally a single large chip into multiple functional modules, each manufactured on the most suitable process, and then integrating them on the same substrate through advanced packaging.

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Oct 12

NVIDIA H100/H200 relies on CoWoS to stack-package GPU dies together with HBM memory.

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Oct 12

CoWoS (Chip on Wafer on Substrate) is an advanced packaging technology developed by TSMC that achieves higher bandwidth and lower power consumption by integrating multiple chips on a single substrate.

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Oct 12

The compute bottleneck has shifted from chip production capacity to advanced packaging (CoWoS) and high-bandwidth memory (HBM).

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Oct 6

Determining whether there is a bubble in AI requires a comprehensive assessment combining capital expenditure data from multiple cloud vendors, GPU utilization rates, paid conversion rates of AI applications, and the macroeconomic interest rate environment.

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Aug 31

Between 2023 and 2024, the delivery lead time for NVIDIA H100s once reached 36–52 weeks; by the second half of 2025, GPU availability improved significantly as TSMC expanded its CoWoS advanced packaging capacity.

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