DRAM
A widely used type of semiconductor memory employed as main memory in computers, mobile devices, and servers. High density and low cost are its core competitive attributes. The market has long been dominated by an oligopoly of three manufacturers: Samsung, SK Hynix, and Micron.
Timeline (last 90 days)
4F² is a measure of area efficiency for DRAM memory chips, meaning each memory cell occupies only 4 times the minimum feature size in area, representing the theoretical limit of storage density, while mainstream DRAM today typically ranges between 6F² and 8F².
Rising memory prices force device manufacturers to absorb higher bill-of-materials costs or configure lower-capacity memory within the same budget.
DRAM price cycles are often attributed to the pork cycle effect: when prices are high, manufacturers expand capacity; once capacity is released, prices plummet; manufacturers then cut investment, supply contracts, and prices rise again.
Between 2022 and 2023, DRAM prices experienced a decline of more than 50%.
Memory (DRAM) is a cyclical commodity whose price fluctuates frequently under the combined influence of production capacity, demand, and market inventory.
HBM is derived from standard DRAM processes, and producing HBM consumes a large amount of wafer capacity that could otherwise be used for ordinary DRAM
Flash memory has inherent advantages over DRAM in capacity density and cost, but has disadvantages in write endurance and latency.
DRAM read/write latency is approximately 60–100 nanoseconds, while NAND flash read latency is typically on the order of 10–100 microseconds.
CXMT is one of the few companies on the Chinese mainland with DRAM mass production capabilities.
If CXMT's production capacity reaches tens of thousands of wafer starts per month or more, it will have a non-negligible disruptive effect on global DRAM supply and demand balance.
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All Facts (20)
Flash chips provide far greater storage density per unit area than DRAM at a much lower cost
90%UnverifiedA tiered memory architecture organizes HBM, DRAM, and CXL extended memory pools into a hierarchical structure, with HBM serving as the high-speed cache layer, DRAM as the main memory layer, and CXL providing large-capacity shareable memory resources.
60%UnverifiedHBM uses TSV technology to drill thousands of micron-scale through-holes in extremely thin DRAM wafers, requiring each DRAM die layer to be ground down to approximately 30–40 micrometers in thickness.
60%Unverified4F² is a measure of area efficiency for DRAM memory chips, meaning each memory cell occupies only 4 times the minimum feature size in area, representing the theoretical limit of storage density, while mainstream DRAM today typically ranges between 6F² and 8F².
50%UnverifiedMemory (DRAM) is a cyclical commodity whose price fluctuates frequently under the combined influence of production capacity, demand, and market inventory.
50%UnverifiedRising memory prices force device manufacturers to absorb higher bill-of-materials costs or configure lower-capacity memory within the same budget.
50%UnverifiedDRAM price cycles are often attributed to the pork cycle effect: when prices are high, manufacturers expand capacity; once capacity is released, prices plummet; manufacturers then cut investment, supply contracts, and prices rise again.
50%UnverifiedBetween 2022 and 2023, DRAM prices experienced a decline of more than 50%.
50%UnverifiedHBM is derived from standard DRAM processes, and producing HBM consumes a large amount of wafer capacity that could otherwise be used for ordinary DRAM
50%UnverifiedDRAM read/write latency is approximately 60–100 nanoseconds, while NAND flash read latency is typically on the order of 10–100 microseconds.
50%UnverifiedFlash memory has inherent advantages over DRAM in capacity density and cost, but has disadvantages in write endurance and latency.
50%UnverifiedThe core of DRAM competition lies in the capacity density and cost advantages brought by process scaling, which differs from logic chips.
50%UnverifiedThe difficulty of DRAM process scaling lies in the vertical deepening of capacitor structures and precise control of transistors, which is more challenging than logic chips.
50%UnverifiedHistorically, DRAM manufacturers such as Taiwan's Powerchip and Elpida were driven out of the market in price wars.
50%UnverifiedCXMT is one of the few companies on the Chinese mainland with DRAM mass production capabilities.
50%UnverifiedThe most advanced DRAM from Samsung, SK Hynix, and Micron has progressed to the 1α (approximately 14–15 nm) and even 1β (approximately 13 nm) nodes, and they are advancing toward 1γ.
50%UnverifiedSK Hynix is a world-leading supplier of DRAM and NAND flash memory.
50%UnverifiedSince 2023, with the explosion of generative AI applications such as ChatGPT, demand for HBM and high-capacity server DRAM in data centers has risen sharply.
50%UnverifiedMemory manufacturers have prioritized more capacity toward higher-margin AI memory products, causing the supply of ordinary DRAM and NAND for the consumer market to tighten.
50%UnverifiedBetween 2021 and 2022, DRAM prices rose sharply due to a surge in pandemic-driven demand and lagging production capacity; from 2023 through early 2024, prices went through a notable downward cycle, during which major manufacturers significantly cut production.
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