B200

英伟达最新的B200芯片单卡热设计功耗达1000瓦

装满B200芯片的机架功率可达120千瓦，是传统服务器机架的十倍以上

Image models can maintain INT8 or FP8 precision when offloaded, and Z-Image generation time on a B200 with a 10 GiB VRAM limit dropped from 38.4 seconds to 2.3 seconds

On the B200, the per-step time for LoRA SFT training of Qwen3.5-9B decreased from 0.84 seconds to 0.77 seconds.

NVIDIA's A100, H100, and the latest B200 GPUs have become the de facto standard for AI training and inference.

In GPU Index's price data snapshot, the lowest price for H100 is $1.37/hr (Vast.ai, spot instance), for H200 is $2.62/hr (CoreWeave, spot), for A100 is $1.15/hr (Paperspace, three-year contract), for L40S is $0.79/hr (RunPod, community cloud), and for B200 is $4.26/hr (CoreWeave, spot).

An NPU equipped with VKORE reaches about 75% of a single B200's pretraining throughput.

The inventory of exposed devices covers high-end accelerators such as H100, H200, B200, and Blackwell Ultra B300, as well as consumer-grade GPUs including the RTX 4090 and RTX 5090.

In a Kimi Linear, 8-card B200, concurrency-8 test, cached-prefix throughput improved by approximately 10.9x.

The Laya decision model responds up to 4.1 times faster for short requests, with a 3-question guardrail check on a B200 dropping from 11.6 ms to 2.8 ms.

Kimi-K2.7-Code can be trained on 6 B200 GPUs with packed INT4 experts, whereas using 16-bit copies would require approximately 2 TB of VRAM.

When gpt-oss is loaded with load_in_4bit = False, MXFP4 experts are retained, allowing gpt-oss-120b to be trained on a single B200

On the B200, a single 3-question guardrail check was reduced from 11.6 ms to 2.8 ms, and Laya's loading time was shortened from approximately 17 seconds to approximately 9 seconds

First-frame rendering for the MiniMax-H3 model can complete up to approximately one minute earlier, and peak VRAM usage on A100, B200, and RTX PRO 6000 has been reduced by 25–29 GiB.

From NVIDIA's A100 to H100 to B200, each generation provides approximately 1.5 to 3 times the AI training compute at the same power consumption.

Community benchmark comparison data: M2 Ultra approximately 20 tokens/second, M3 Ultra 512 GB at 39.8 tokens/second, a single B200 at 119.7 tokens/second, 8× RTX Pro 6000 at approximately 204 tokens/second, a modified RTX 4090 with 48 GB VRAM on a custom backend at 367 tokens/second, and dual H200 at approximately 375 tokens/second.

In a prefill-only test running gpt-oss-120b on 4× B200s, DWDP4 achieves a 1.92× speedup over DEP4 under the MNT 32K/ISL 32K configuration and a 1.54× throughput improvement at saturation (506K vs. 329K tok/s).

The A100 (2020) delivers 312 TFLOPS of FP16 compute and 2 TB/s of HBM2e bandwidth; the H100 (2022) increases FP16 compute to 989 TFLOPS and introduces FP8 support for the first time; the B200 (2024) pushes FP8 compute to the 9 PETAFLOPS level with HBM3e bandwidth reaching 8 TB/s.

The Blackwell architecture's B200/GB200 contains 208 billion transistors, uses a dual-chip package design, and achieves an inter-chip interconnect bandwidth of 10 TB/s.

The Blackwell architecture released in 2024 (represented by the B200/GB200) has a transistor count of 208 billion, uses a dual-chip packaging design, and is merged into a single logical GPU via 10 TB/s chip-to-chip interconnect.